Each new manufacturing process generation brings with it a whole new set of challenges. In an era of multimillion-gate complexity and increasing density of nanometer manufacturing defects, a key ...

Left-shifting DFT, scalable tests from manufacturing to the field, enabling system-level tests for in-field debug.

Test compression offers the benefits of higher quality and lower test cost, but how do you choose the best methodology and tools for your current and future designs? Test compression evaluations ...

Test compression technology was invented to address the problem of escalating test-pattern size. Compression allows more test vectors to be applied to an IC in a shorter time and with fewer tester ...

Small geometries have projected IC technology into an era where test has become a crucial part in the chip design process and have introduced new challenges needing solutions that use already ...

As chips become more heterogeneous with more integrated functionality, testing them presents increasing challenges — particularly for high-speed system-on-chip (SoC) designs with limited test pin ...

For the past five years, the cost of test has prevailed as the hottest topic in test. During this period, automated test equipment (ATE) has made a dramatic move towards low-cost design for test (DFT) ...